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September 1996
NDS356AP P-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
SuperSOT -3 P-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as notebook computer power management, portable electronics, and other battery powered circuits where fast high-side switching, and low in-line power loss are needed in a very small outline surface mount package.
TM
Features
-1.1 A, -30 V, RDS(ON) = 0.3 @ VGS=-4.5 V RDS(ON) = 0.2 @ VGS=-10 V. Industry standard outline SOT-23 surface mount package using proprietary SuperSOTTM-3 design for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability.
________________________________________________________________________________
D
G
S
Absolute Maximum Ratings
Symbol VDSS VGSS ID PD TJ,TSTG Parameter Drain-Source Voltage
T A = 25C unless otherwise noted
NDS356AP -30 20
(Note 1a)
Units V V A
Gate-Source Voltage - Continuous Maximum Drain Current - Continuous - Pulsed Maximum Power Dissipation
(Note 1a) (Note 1b)
1.1 10 0.5 0.46 -55 to 150
W
Operating and Storage Temperature Range
C
THERMAL CHARACTERISTICS RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
250 75
C/W C/W
(c) 1997 Fairchild Semiconductor Corporation
NDS356AP Rev.C1
Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS IDSS Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current VGS = 0 V, ID = -250 A VDS = -24 V, VGS = 0 V TJ =55C IGSSF IGSSR Gate - Body Leakage, Forward Gate - Body Leakage, Reverse VGS = 20 V, VDS = 0 V VGS = -20V, VDS = 0 V -30 -1 -10 100 -100 V A A nA nA
ON CHARACTERISTICS (Note 2) VGS(th) RDS(ON) Gate Threshold Voltage VDS = VGS, ID = -250 A TJ =125C Static Drain-Source On-Resistance VGS = -4.5 V, ID = -1.1 A TJ =125C VGS = -10 V, ID = -1.3 A ID(ON) On-State Drain Current VGS = -4.5 V, VDS = -5 V VDS = -5 V, ID = -1.1 A VDS = -10 V, VGS = 0 V, f = 1.0 MHz -3 2 -0.8 -0.5 -1.6 -1.3 0.25 0.35 0.14 -2.5 -2.2 0.3 0.4 0.2 A S V
gFS
Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd
Forward Transconductance
Input Capacitance Output Capacitance Reverse Transfer Capacitance
DYNAMIC CHARACTERISTICS 280 170 65 pF pF pF
SWITCHING CHARACTERISTICS (Note 2) Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = -10 V, ID = -1.1 A, VGS = -5 V VDD = -10 V, ID = -1 A, VGS = -10 V, RGEN = 50 8 17 53 38 3.4 0.7 1.5 15 30 90 80 4.4 ns ns ns ns nC nC nC
NDS356AP Rev.C1
Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS ISM VSD Maximum Continuous Source Current Maximum Pulsed Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = -0.42 (Note 2) -0.8 -0.42 -10 -1.2 A A V
Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.
PD (t) =
T J -T A R JA(t)
=
T J -T A R JC +R CA (t)
= I 2 (t) x R DS(ON)@T J D
Typical RJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 250oC/W when mounted on a 0.02 in2 pad of 2oz copper. b. 270oC/W when mounted on a 0.001 in2 pad of 2oz copper.
1a
1b
Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.
NDS356AP Rev.C1
Typical Electrical Characteristics
-10 I D , DRAIN-SOURCE CURRENT (A)
2
-6.0 -5.5 -5.0
R DS(on), NORMALIZED DRAIN-SOURCE ON-RESISTANCE
VGS = -10V
-7.0
1.8 1.6
V GS = -3.5 V -4.0
-8
-6
-4.5 -4.0 -3.5
1.4
-4.5
1.2 1 0.8 0.6 0.4 0 -2 -4 -6 I D , DRAIN CURRENT (A) -8
-5.0 -5.5 -6.0 -7.0 -10
-4
-2
-3.0
0 0 -1 V
DS
-2 -3 -4 , DRAIN-SOURCE VOLTAGE (V)
-5
-10
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
1.6 DRAIN-SOURCE ON-RESISTANCE R DS(on), NORMALIZED DRAIN-SOURCE ON-RESISTANCE
2
1.4
RDS(ON) , NORMALIZED
I D = -1.1A V GS = -4.5V
V GS = -4.5V
1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0 -2 I
D
TJ = 125C
1.2
25C -55C
1
0.8
0.6 -50
-25
0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C)
125
150
-4 , DRAIN CURRENT (A)
-6
-8
Figure 3. On-Resistance Variation with Temperature.
Figure 4. On-Resistance Variation with Drain Current and Temperature.
-5 GATE-SOURCE THRESHOLD VOLTAGE
1.2
V DS = -10V
-4
T
J
= -55C
25C 125C
V GS(th) , NORMALIZED
1.1
VDS = V
GS
I D =- 250A
I D, DRAIN CURRENT (A)
-3
1
-2
0.9
-1
0.8
0 -1 -2 V
GS
-3 -4 , GATE TO SOURCE VOLTAGE (V)
-5
0.7 -50
-25
0
J
25
50
75
100
125
150
T , JUNCTION TEMPERATURE (C)
Figure 5. Transfer Characteristics.
Figure 6. Gate Threshold Variation with Temperature.
NDS356AP Rev.C1
Typical Electrical Characteristics (continued)
1.08
5
DRAIN-SOURCE BREAKDOWN VOLTAGE
1.06 1.04 1.02 1 0.98 0.96 0.94 -50
-I S , REVERSE DRAIN CURRENT (A)
I D = -250A
2 1 0.5 0.1
VGS = 0V T J = 125C
, NORMALIZED
25C
0.01
BV
DSS
-55C
0.001
-25
0 T
J
25 50 75 100 , JUNCTION TEMPERATURE (C)
125
150
0.0001 0 0.2 0.4 0.6 0.8 1 -V SD , BODY DIODE FORWARD VOLTAGE (V) 1.2
Figure 7. Breakdown Voltage Variation with Temperature.
Figure 8. Body Diode Forward Voltage Variation with Source Current and Temperature.
600 -VGS , GATE-SOURCE VOLTAGE (V) 400 300 CAPACITANCE (pF) 200
10
VDS = -5V I D = -1.1A
8
-10V -15V
C iss Coss
6
100
4
C rss
50 30 0.1
f = 1 MHz V GS = 0 V
0.2 -V 0.5 1 2 5 , DRAIN TO SOURCE VOLTAGE (V) 10 20
2
0
DS
0
1
2
3 4 5 Q g , GATE CHARGE (nC)
6
7
Figure 9. Capacitance Characteristics.
Figure 10. Gate Charge Characteristics.
VDD
t d(on)
ton
t off tr
90%
t d(off)
90%
VIN
D
RL V OUT
VOUT
10%
tf
VGS
R GEN
10% 90%
G
DUT
S
V IN
10%
50%
50%
PULSE WIDTH
INVERTED
Figure 11. Switching Test Circuit.
Figure 12. Switching Waveforms.
NDS356AP Rev.C1
Typical Electrical Characteristics (continued)
gFS, TRANSCONDUCTANCE (SIEMENS) 5 20
V DS = - 5V
-I D , DRAIN CURRENT (A)
10
4
TJ = -55C 25C 125C
5 2 1 0.5
R (O DS N) LIM IT
1m
100 us s
10 10
3
ms s
0m
2
0.1
1
0.05
VGS = -4.5V SINGLE PULSE RJA = See Note 1b A TA = 25C
0.2
1s DC
0
0
-1
-2 -3 I D , DRAIN CURRENT (A)
-4
-5
0.01 0.1
0.5 1 2 5 10 - V , DRAIN-SOURCE VOLTAGE (V)
DS
20
30
Figure 13. Transconductance Variation with Drain Current and Temperature.
Figure 14. Maximum Safe Operating Area.
STEADY-STATE POWER DISSIPATION (W)
0.8
0.6
1b
1a
-I D , STEADY-STATE DRAIN CURRENT (A)
1
1.4 1.3 1.2 1.1 1 1b
4.5"x5" FR-4 Board o TA = 25 C Still Air V = -4.5V GS 1a
0.4
0.2
4.5"x5" FR-4 Board o TA = 25 C Still Air
0.9 0.8
0 0 0.1 0.2 0.3 0.4 2oz COPPER MOUNTING PAD AREA (in2 )
0
0.1 0.2 0.3 2 2oz COPPER MOUNTING PAD AREA (in )
0.4
Figue 15. SuperSOTTM _ 3 Maximum Steady-State Power Dissipation versus Copper Mounting Pad Area.
Figure 16. Maximum Steady-State Drain Current versus Copper Mounting Pad Area.
1
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE
0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 0.0001
D = 0.5 0.2 0.1 0.05 0.02 0.01 Single Pulse
R JA (t) = r(t) * R JA R JA = See Note 1b
P(pk)
t1
t2
TJ - TA = P * R JA (t) Duty Cycle, D = t1 /t2
0.001
0.01
0.1 t 1 , TIME (sec)
1
10
100
300
Figure 17. Transient Thermal Response Curve.
Note : Characterization performed using the conditions described in note 1b. Transient thermal response will change depending on the circuit board design.
NDS356AP Rev.C1

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